Design-Reuse

Hitachi Endorses Model Technology ModelSim for Verilog Simulation

PORTLAND, Ore.--(BUSINESS WIRE)--Oct. 3, 2001--Model Technology(TM), a Mentor Graphics company, today announced that the ModelSim® hardware description language (HDL) simulator has received Verilog ...
EDN

SunaptiCAD VeriLogger Extreme: Verilog 2001 simulator provides faster RTL and gate-level simulations

Reducing simulation debugging time, the compiled-code Verilogger Extreme Verilog 2001 simulator provides fast simulation of RTL and gate-level simulations using SDF (Synopsys Delay Format) timing ...
EDN

Synopsys speeds Verilog, VHDL simulation

MOUNTAIN VIEW, Calif. — Claiming substantial speedups in its Verilog and VHDL simulation products, Synopsys Inc. this week is announcing releases of its VCS Verilog and Scirocco VHDL simulators. The ...
Electronic Design

Mixed-Signal Simulator Speaks Verilog-AMS

Designers today find themselves adding more and more analog and mixed-signal content to their creations. And at nanometer geometries and gigabit speeds, digital circuits begin to look more analog than ...